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Resumen del manual
1.1 Task B format ¦ CRT Interface: — Uses three 8-bit DACs — Support up to 135 MHz — 1280x1024 non-interlaced CRT @ 8 bpp, up to 75 Hz — 1024x768 non-interlaced CRT @ 16 bpp, up to 85 Hz ¦ TFT Interface: — Direct connection to TFT panels — 800x600 non-interlaced TFT @ 16 bpp graphics, up to 85 Hz — 1024x768 non-interlaced TFT @ 16 bpp graphics, up to 75 Hz — TFT on IDE: FPCLK max is 40 MHz — TFT on Parallel Port: FPCLK max is 80 MHz ¦ TV Interface: — Uses four 10-bit DACs — 720x480 NTSC @ 60 Hz or 720x576 PAL @ 50 Hz — NTSC-M, PAL-M/B/D/G/H/I — Luminance filtering with 2x oversampling and sinx/x correction — Chrominance filtering with 4x oversampling — Flicker filter with a three-line buffer for graphics display on TV — Composite, S-Video and YCrCb component video outputs — Analog video output interface supports SCART standard (both RGBCvbs and YCCvbs) — Support for VBI (Vertical Blanking Interval) transfer from Video Port input to TV Encoder AMD Geode™ SC1200/SC1201 Processor Data Book Overview 32579B — VBI Generation Support: – Wide Screen Signaling (WSS) – Closed caption – Extended Data Services (EDS) – Copy Generation Management System (CGMS) — Four-field NTSC or eight-field PAL generation — Macrovision copy protection version 7.1.L1 (SC1201 only, see "Macrovision Product Notice" on page 441) Core Logic Module ¦ Audio Codec Interface: — AC97/AMC97 (Rev. 2.0) codec interface — Six DMA channels ¦ PC/AT Functionality: — Programmable Interrupt Controller (PIC), 8259Aequivalent — Programmable Interval Timer (PIT), 8254-equivalent — DMA Controller (DMAC), 8237-equivalent ¦ Power Management: — ACPI v1.0 compliant — Sx state control of three power planes — Cx/Sx state control of clocks and PLLs — Thermal event input — Wakeup event support: – Three general-purpose events – AC97 codec event – UART2 RI# signal – Infrared (IR) event ¦ General Purpose I/Os (GPIOs): — 27 multiplexed GPIO signals ¦ Low Pin Count (LPC) Bus Interface: — Specification v1.0 compatible ¦ PCI Bus Interface: — PCI v2.1 compliant with wakeup capability — 32-Bit data path, up to 33 MHz — Glueless interface for an external PCI device — Fixed priority — 3.3V signal support only ¦ Sub-ISA Bus Interface: — Up to 16 MB addressing — Supports a chip select for ROM or Flash EPROM boot device — Supports either: – M-Systems DiskOnChip DOC2000 Flash file system – NAND EEPROM — Supports up to two chip selects for external I/O devices — 8-Bit (optional 16-bit) data bus width — Shares balls with PCI signals — Is not a subtractive agent ¦ IDE Interface: — Two IDE channels for up to four external IDE devices — Supports ATA-33 synchronous DMA mode transfers, up to 33 MB/s ¦ Universal Serial Bus (USB): — USB OpenHCI 1.0 compliant — Three ports SuperI/O Module ¦ Real-Time Clock (RTC): — DS1287, MC146818 and PC87911 compatible — Multi-century calendar ¦ ACCESS.bus (ACB) Interface: — Two ACB interface ports ¦ Parallel Port: — EPP 1.9 compliant — IEEE 1284 ECP compliant, including level 2 ¦ Serial Port (UART): — UART1, 16550A compatible (SIN, SOUT, BOUT pins), used for SmartCard interface — UART2, 16550A compatible — Enhanced UART with fast Infrared (IR) Other Features ¦ High-Resolution Timer: — 32-Bit counter with 1 .s count interval ¦ WATCHDOG Timer: — Interfaces to INTR, SMI, Reset ¦ Clocks: — Input (external crystals): – 32.768 KHz (internal clock oscillator) – 27 MHz (internal clock oscillator) —Output: – AC97 clock (24.576 MHz) – Memory controller clock (66 MHz to 100 MHz) – PCI clock (33 MHz) ¦ JTAG Testability: — Bypass, Extest, Sample/Preload, IDcode, Clamp, HiZ ¦ Voltages: — Internal logic: 266 MHz @ 1.8V — Standby logic: 266 MHz @ 1.8V — I/O: 3.3V — Standby I/O: 3.3V — Battery (if used): 3.0V AMD Geode™ SC1200/SC1201 Processor Data Book 32579B Overview AMD Geode™ SC1200/SC1201 Processor Data Book Architecture Overview 32579B 2 Architecture Overview As illustrated in Figure 1-1 on page 13, the SC1200/ SC1201 processor contains the following modules in one integrated device: • GX1 Module: — Combines advanced CPU performance with MMX support, fully accelerated 2D graphics, a 64-bit synchronous DRAM (SDRAM) interface and a PCI bus controller. Integrates GX1 silicon revision 8.1.1. • Video Processor Module: — A low-power CRT and TFT support module with a hardware video accelerator for scaling, filtering and color space conversion, and a video input port (VIP). Includes an NTSC/PAL TV encoder. • Core Logic Module: — Includes PC/AT functionality, an IDE interface, a Universal Serial Bus (USB) interface, ACPI 1.0 compliant power management, and an audio codec interface. • SuperI/O Module: — Includes two Serial Ports, an Infrared (IR) Port, a Parallel Port, two ACCESS.bus interfaces, and a Real-Time Clock (RTC). 2.1 GX1 Module The GX1 processor (silicon revision 8.1.1) is the central module of the SC1200/SC1201 processor. For detailed information regarding the GX1 module, refer to the AMD Geode™ GX1 Processor Data Book and the AMD Geode™ GX1 Processor Silicon Rev...
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